usbcore.test package

Submodules

usbcore.test.clock module

class usbcore.test.clock.CommonTestMultiClockDomain[source]

Bases: object

setUp(clock_names)[source]
update_clocks()[source]
wait_for_edge(name)[source]
update_internal_signals()[source]

usbcore.test.common module

usbcore.test.common.grouper(n, iterable, pad=None)[source]

Group iterable into multiples of n (with optional padding).

>>> list(grouper(3, 'abcdefg', 'x'))
[('a', 'b', 'c'), ('d', 'e', 'f'), ('g', 'x', 'x')]
class usbcore.test.common.BaseUsbTestCase(methodName='runTest')[source]

Bases: unittest.case.TestCase

Test case helpers common to all test cases, simple and complex

make_vcd_name(basename=None, modulename=None, testsuffix=None)[source]

Create a name for the vcd file based on the test case module/class/method, with optional testsuffix (eg, foo.N)

class usbcore.test.common.CommonUsbTestCase[source]

Bases: object

Base set of USB compliance tests.

maxDiff = None
run_sim(stim)[source]
tick_sys()[source]
tick_usb12()[source]
tick_usb48()[source]
update_internal_signals()[source]
trigger(epaddr)[source]
pending(epaddr)[source]
clear_pending(epaddr)[source]
response(epaddr)[source]
set_response(epaddr, v)[source]
expect_last_tok(epaddr, value)[source]
set_data(epaddr, data)[source]
expect_data(epaddr, data)[source]
expect_setup(epaddr, data)[source]
dtb(epaddr)[source]
assertMultiLineEqualSideBySide(data1, data2, msg)[source]
ep_print(epaddr, msg, *args)[source]
patch_csrs()[source]
idle(cycles=10)[source]
send_token_packet(pid, addr, epaddr)[source]
send_sof_packet(ts)[source]
send_data_packet(pid, data)[source]
send_handshake(pid)[source]
send_ack()[source]
send_nak()[source]
expect_packet(packet, msg=None)[source]

Except to receive the following USB packet.

expect_data_packet(pid, data)[source]
expect_ack()[source]
expect_nak()[source]
expect_stall()[source]
check_pending(epaddr)[source]
check_no_pending(epaddr)[source]
check_no_pending_and_respond_ack(epaddr)[source]
transaction_setup(addr, data)[source]
transaction_data_out(addr, epaddr, data, chunk_size=8)[source]
transaction_status_out(addr, epaddr)[source]
transaction_data_in(addr, epaddr, data, chunk_size=8, dtb=<PID.DATA1: 11>)[source]
transaction_status_in(addr, epaddr)[source]
control_transfer_in(addr, setup_data, descriptor_data)[source]
control_transfer_out(addr, setup_data, descriptor_data)[source]
test_sof_stuffing()[source]
test_sof_is_ignored()[source]
test_control_setup()[source]
test_control_setup_clears_stall()[source]
test_control_transfer_in()[source]
test_control_transfer_in_nak_data()[source]
test_control_transfer_in_nak_status()[source]
test_control_transfer_out()[source]
test_control_transfer_in_out()[source]
test_control_transfer_out_nak_data()[source]
test_control_transfer_out_nak_status()[source]
test_in_transfer()[source]
test_in_transfer_stuff_last()[source]
test_debug_in()[source]
test_debug_in_missing_ack()[source]
test_debug_out()[source]
test_data_in_byte_1()[source]
test_data_in_byte_2()[source]
test_data_in_byte_a()[source]
test_setup_clears_data_toggle_bit()[source]
test_data_toggle_bit_multiple_endpoints()[source]
test_in_transfer_nak()[source]
test_in_stall()[source]
test_out_transfer()[source]
test_out_transfer_nak()[source]
test_out_stall()[source]

Module contents